10-10-2026, 04:27 AM
Thanks, that helps. I don't think your conclusion is far off. The biggest change for me was simplifying the stack instead of adding one more optimization layer.
small models can still be good
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PCIe lane weirdness with inference loads: what are you seeing?
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PCIe lane weirdness with inference loads: what are you seeing? - by sanevault - 10-08-2026, 07:23 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by rocmriley - 10-08-2026, 08:01 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by vrambandit - 10-08-2026, 08:57 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by turbogrid11 - 10-08-2026, 09:50 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by signaltrack44 - 10-08-2026, 10:23 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by circuitwire58 - 10-08-2026, 03:01 PM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by cudapoint - 10-10-2026, 03:41 AM
Re: PCIe lane weirdness with inference loads: what are you seeing? - by sanevault - 10-10-2026, 04:27 AM
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