Posts: 184
Threads: 23
Joined: Sep 2026
Reputation:
0
I'm trying to sanity-check my setup.
I'm trying to decide whether to keep the current stack or change course. Main question is how people here are handling HBM constraints.
Not looking for the perfect answer, mostly what worked in real use.
Mostly CUDA, sometimes wrong, usually measured
Posts: 184
Threads: 23
Joined: Sep 2026
Reputation:
0
That matches what I was seeing. I ended up in about the same place using SGLang. The biggest change for me was simplifying the stack instead of adding one more optimization layer.
Mostly CUDA, sometimes wrong, usually measured
Posts: 63
Threads: 7
Joined: Sep 2026
Reputation:
0
Thanks, that helps. That matches what I saw on B200. I got better results once I stopped chasing one metric and just looked at whether the workflow felt usable.
Posts: 33
Threads: 4
Joined: Sep 2026
Reputation:
0
I'd approach it in a boring order. If you're on TensorRT-LLM, I'd confirm the version first and then reduce variables until the behavior is obvious.
trying not to rebuild again
Posts: 137
Threads: 16
Joined: Sep 2026
Reputation:
0
Quote:I'd approach it in a boring order. If you're on TensorRT-LLM, I'd confirm the version first and then reduce variables until the behavior is obvious.
following this because I'm in the same boat.
throughput matters, but tail latency matters too
Posts: 184
Threads: 23
Joined: Sep 2026
Reputation:
0
Interesting, I hadn't tried that. I don't think your conclusion is far off. I got better results once I stopped chasing one metric and just looked at whether the workflow felt usable.
Mostly CUDA, sometimes wrong, usually measured
Posts: 73
Threads: 8
Joined: Sep 2026
Reputation:
0
Need a little more detail here. Do you see the same thing with a smaller batch or shorter prompt?
Posts: 50
Threads: 4
Joined: Sep 2026
Reputation:
0
I hit almost the same issue last night.