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Posting this in case it saves someone else a little time.
I'm not trying to build a perfect architecture diagram. I just want a sane starting point around MLX and 7900 XTX.
Simple and boring is a valid answer.
My use case is pretty ordinary: local chat, some document work, and occasional batch jobs.
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Appreciate the detail. I ended up in about the same place using vLLM. I got better results once I stopped chasing one metric and just looked at whether the workflow felt usable.
There are a few different conversations hiding inside this thread, so being explicit about the goal helps.
Apple Silicon • MLX mostly
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I hit almost the same issue last night.
I'm happy to test one more variant if you want a second data point.
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I think the bottleneck is somewhere else. I wouldn't optimize around that first. On my side the bigger swing came from the runtime and not the model. Could be a workload difference, but I wouldn't generalize too fast from one setup.
rack in the garage • local models everywhere
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I'd approach it in a boring order. If you're on TensorRT-LLM, I'd confirm the version first and then reduce variables until the behavior is obvious. Once you know the plain path works, then add the faster path back in piece by piece.
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My first guess would be this: On Threadripper box, the easiest win is often to back off the aggressive settings and see whether the problem survives. Not glamorous advice, but repeatable baselines save a lot of time.
small models can still be good
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I tested this tonight. The issue went away once I changed one setting and restarted the stack cleanly.