Posts: 41
Threads: 6
Joined: Oct 2026
Reputation:
0
I'm trying to sanity-check my setup.
My current setup is vLLM with M3 Max, and I keep running into KV cache pressure.
Not looking for the perfect answer, mostly what worked in real use.
Posts: 29
Threads: 2
Joined: Sep 2026
Reputation:
0
Can you fill in a bit more context? What model, what runtime, and roughly what context size?
Posts: 31
Threads: 2
Joined: Oct 2026
Reputation:
0
I'd start with the simpler stack.
Posts: 76
Threads: 8
Joined: Aug 2026
Reputation:
0
I'd approach it in a boring order. Before rebuilding anything, I'd test one clean baseline with Mistral and compare from there. Once you know the plain path works, then add the faster path back in piece by piece.
learning in public
Posts: 45
Threads: 3
Joined: Sep 2026
Reputation:
0
Ran a quick check on my box. My result was mixed: first run looked bad, second run looked normal. The main thing that moved was latency, not quality.
Posts: 43
Threads: 5
Joined: Sep 2026
Reputation:
0
Maybe, but I had the opposite result. I've seen people blame speculative decoding when the real issue was much more mundane. Worth testing the simpler explanation before adopting the more interesting one.
Posts: 49
Threads: 4
Joined: Sep 2026
Reputation:
0
Good point. I ended up in about the same place using Ollama. Worth rechecking your defaults though, because one bad assumption can make the rest of the thread look confusing.
Posts: 211
Threads: 21
Joined: Sep 2026
Reputation:
0
Quote:Good point. I ended up in about the same place using Ollama. Worth rechecking your defaults though, because one bad assumption can make the rest of th
Thanks, that helps. That matches what I saw on A6000. Worth rechecking your defaults though, because one bad assumption can make the rest of the thread look confusing.
7900 XTX / ROCm / somehow still optimistic
Posts: 25
Threads: 4
Joined: Sep 2026
Reputation:
0
That matches what I was seeing. The pattern around long context has been pretty similar for me.